1 Field of the Invention
The present invention relates to a plasma display panel, a plasma display apparatus using the same, and a method of driving the plasma display panel.
2. Description of the Related Art
In a color plasma display panel (PDP), a display is carried out by exciting phosphor by ultraviolet rays generated through gas discharge to emit light. A 3-electrode AC type PDP is adopted for the plasma display apparatus which is mainstream at present. The plasma display apparatus using the 3-electrode AC type PDP will be described below.
FIG. 1 shows the structure of a plasma display panel 130 of a conventional plasma display apparatus. Referring to FIG. 1, the plasma display panel 130 is composed of m sustain electrodes (C) 111-1 to 111-m (m is an even integer equal to or more than 2), m scan electrodes (S) 112-1 to 112-m extending in the same direction as the sustain electrodes, n address electrodes (D) 107-1 to 107-n (n is an even integer equal to or more than 2) extending in a direction orthogonal to the sustain electrodes, and (m×n) cells 121 in which discharge gas is enclosed. The (m×n) cells 121 are provided at intersections of the m sustain electrodes (C) 111-1 to 111-m and the m scan electrodes (S) 112-1 to 112-m, and the n address electrodes (D) 107-1 to 107-n, such that they are arranged in a matrix of m rows and n columns. A discharge gap 122 is provided between the sustain electrode (C) 111-i (i is an integer and 1≦i≦m) and the scan electrode (S) 112-i, and a non-discharge gap 113 is provided between the sustain electrode (C) 111-(i+1) and the scan electrode (S) 112-i, or between the sustain electrode (C) 111-i and the scan electrode (S) 112-(i+1).
FIG. 2 is a perspective cross sectional view showing a part of the conventional plasma display panel 130. The plasma display apparatus is further composed of a front substrate section on the display side, and a back substrate section 102. The front substrate section is composed of a front substrate 101, a transparent dielectric layer 105, and a protection layer 106. The back substrate section is composed of a back substrate 102, a dielectric layer 108, separation walls 109 and a phosphor layer 110. A glass substrate is exemplified as the front substrate 101 and the back substrate 102.
The address electrode (D) 107-j (j is an integer and 1≦j≦n) is provided on the back substrate 102 to extend into a column direction. The dielectric layer 108 is provided on the back substrate 102 to cover the address electrodes (D) 107-j. 
The separation walls 109 are formed in a lattice form and are provided on the back substrate 102. The (m×n) cells 121 are partitioned and formed between the front substrate 101 and the back substrate 102 by the separation walls 109. Each cell 121 is formed on the address electrode (D) 107-j. The separation walls 109 have horizontal separation walls 109′ extending to a row direction and vertical separation walls 109″ extending to the column direction, for preventing crosstalk of the discharge. The horizontal separation wall 109′ is orthogonal to the address electrode (D) 107-j. The vertical separation wall 109″ is provided on the back substrate 102 in the parallel to the address electrodes (D) 107-j. Also, the horizontal separation walls 109′ prevent the following faults. That is, the horizontal separation walls 109′ prevent light emission from the cell 121 to which a write operation is not carried out, i.e., so-called miss-light. Also, when the write operation is carried out to first and second cells 121 adjacent in column direction, the horizontal separation wall 109′ prevents a write fault from being caused in the second cell as the result that a wall charge accumulated in the first cell 121 when discharge is caused in the first cell 121 weakens the electric field in the second cell 121 since the wall charge acts in a direction opposite to an application voltage.
The phosphor layers 110 of red, green, and blue are formed on the dielectric layer 108 and the side surfaces of the separation walls 109, i.e., side surfaces of the horizontal separation walls 109′ and vertical separation walls 109″ by a screen-print method for visible light emission. The protection layer 106 is provided between the front substrate 101 and the separation wall 109. The transparent dielectric layer 105 is provided between the front substrate 101 and the protection layer 106.
FIG. 3 is a plan view showing a part of the conventional plasma display panel 130, viewing from a display side. FIG. 4 is a cross sectional view showing the conventional plasma display panel 130 along the Y1-Y2 line in FIG. 3.
The sustain electrodes (C) 111-1 to 111-m and the scan electrodes (S) 112-1 to 112-m are provided between the front substrate 101 and the transparent dielectric layer 105 to extend to the row (X) direction. Each electrode of the sustain electrodes (C) 111-1 to 111-m and the scan electrode (S) 112-1 to 112-m is constituted from a transparent electrode 103 extending to the row direction, and a bus electrode 104 extending to the row direction. The transparent electrode 103 is provided to have an area sufficient to cause discharge of a predetermined size and to improve a transmission factor of the light emitted through the discharge. The bus electrode 104 is a metal electrode connected with the transparent electrode 103 for decreasing the line resistance of the sustain electrode or scan electrode. The transparent electrodes 103 of the sustain electrodes (C) 111-1 to 111-m and the transparent electrodes 103 of the scan electrodes (S) 112-i to 112-m are provided above the cell 121. The bus electrodes 104 of the sustain electrodes (C) 111-1 to 111-m and the bus electrodes 104 of the scan electrodes (S) 112-1 to 112-m are provided above the cell 121 and horizontal separation walls 109′.
More specifically, as shown in FIG. 3, a first gap is provided between the transparent electrode 103 of the sustain electrode (C) 111-1 and the transparent electrode 103 of the scan electrode (S) 112-1. The first gap is provided above the cell 121 to have a first predetermined distance corresponding to a discharge gap 122. A half of the bus electrode 104 of the sustain electrode (C) 111-2 is provided above the horizontal separation wall 109′, and the other half is provided above the cell 121. Also, a half of the bus electrode 104 of the sustain electrode (C) 111-2 is provided above the horizontal separation wall 109′ and the remaining half is provided above the cell 121. The transparent electrode 103 of the scan electrode (S) 112-1 on the side of the sustain electrode (C) 111-2 is provided above the horizontal separation wall 109′, and is connected with the bus electrode 104 which is provided above the cell 121 and the horizontal separation wall 109′. A half portion of the scan electrode (S) 112-1 on the side of the bus electrode 104 is provided above the horizontal separation wall 109′ and the remaining half portion is provided above the cell 121. A second gap is provided between the bus electrode 104 of the scan electrode (S) 112-1 and the bus electrode 104 of the sustain electrode (C) 111-2 to have a second predetermined distance corresponding to a non-discharge gap 113. The bus electrode 104 of the scan electrode (S) 112-1 and the bus electrode 104 of the sustain electrode (C) 111-2 are provided above the cell 121 and the horizontal separation wall 109′ symmetrically with respect to a center line L of the horizontal separation wall 109′ passing through a center point P. Thus, the center line L and the center point P of the horizontal separation wall 109′ are used as a reference point to arrange the sustain electrodes (C) 111-1 to 111-m and the scan electrodes (S) 112-1- to 112-m. 
Various methods are adopted to drive the AC-type PDP at present and an ADS method is a basic method. FIGS. 5A to 5H are timing charts showing the drive voltage waveforms when the conventional plasma display panel is driven by the ADS method. As shown in FIGS. 5A to 5H, in the ADS method, a period of one field or subfield is divided into a reset period, an address period, and a sustain period.
First, in the reset period, pre-discharge is carried out for the stabilization of a subsequent high-speed operation and easy write discharge. In the address period, a scan pulse voltage Vsp is sequentially applied to the scan electrodes 112-1 to 112-m. While the scan pulse voltage Vsp is applied to the scan electrodes 112-1 to 112-m, a write pulse voltage or a data pulse voltage Vdp is applied to the address electrodes 107-1 to 107-n to form a wall charge at an addressed cell. The data pulse voltage Vdp is a voltage corresponding to a picture data. In this address period, a write characteristic operation is carried out. The write characteristic operation is an operation that the picture data is written into the cell 121 addressed by the scan electrode (S) 112-i and the address electrode (D) 107-j so that a write discharge is carried out.
In the subsequent sustain period, a sustain voltage pulse is applied between the sustain electrode 111-i as a common electrode and the scan electrode 112-i such that the voltage of the sustain voltage pulse is lower than a discharge start voltage between these electrodes, and is larger than discharge start voltage when a voltage due to the wall charge is added. As a result, light emission is sustained.
Last, an erasure pulse is applied in the reset period and the wall electric charge is initialized.
When a gradation display is carried in the ADS method, one field is divided into a plurality of subfields and the number of the sustain pulses in each subfield is changed based on a gradation level.
When high fineness of cells is carried out in a large-scaled PDP, each discharge area of the cell becomes small. On the other hand, because there is a forming limit in the separation wall and the bus electrode width, an aperture percentage decreases so that the brightness reduces. In other words, in order to achieve the high brightness in the highly fine PDP, it is important how the aperture percentage is increased. However, when the separation wall 109 and the bus electrodes 104 are formed on a glass substrate with a large area without any fault and break, it is needed to secure the width of an extent or a forming limit. Therefore, it is generally effective to short the non-discharge gap 113 shown in FIG. 3, i.e., a distance between the bus electrodes 104 for increasing the aperture percentage.
In the structure in which the non-discharge gap is made small to the forming limit, it is necessary to secure the width of the horizontal separation wall enough to suppress interference between the neighbor cells. For example, in case that the forming limit between the bus electrodes is 80 μm and the width of the bus electrode 104 in the column direction is 60 μm, the interference between the neighbor cells can be almost suppressed if the width of the horizontal separation wall 109′ is equal to or more than 100 μm in the column direction. In this case, however, a fault is caused, depending on the position relation between the separation wall and the bus electrode. Below, the position relation and the fault will be described.
FIG. 6 is a plan view showing a part of another conventional plasma display panel 130 in a case (A). FIG. 7 is a cross sectional view of the conventional plasma display panel 130 along the line Y1-Y2 of FIG. 6. In the case (A), the width of the horizontal separation wall 109′ in the column direction is sufficiently larger than a first width as a summation of the non-discharge gap 113 and the width of the two bus electrodes 104 in the column direction. In this case, the transparent electrodes 103 of the sustain electrodes (C) 111-1 to 111-m and the scan electrodes (S) 112-1 to 112-m are provided above the cell 121 and the horizontal separation wall 109′, and the bus electrodes 104 of the sustain electrodes (C) 111-1 to 111-m and the scan electrodes (S) 112-1 to 112-m are provided above the horizontal separation wall 109′. In the case (A), there is not interference in a vertical direction. However, the aperture percentage decreases by widening the width of the horizontal separation wall 109′ in the column direction. Thus, sufficient brightness cannot be achieved.
FIG. 8 is a plan view showing a part of the conventional plasma display panel 130 in a case (B).
FIG. 9 is a cross sectional view of the conventional plasma display panel 130 along the line Y1-Y2 of FIG. 8. In the case (B), the width of the horizontal separation wall 109′ in the column direction is smaller than the second width, i.e., a non-discharge gap 113. In this case, the transparent electrodes 103 and the bus electrodes 104 of the sustain electrodes (C) 111-1 to 111-m and the scan electrodes (S) 112-1 to 112-m are provided above the cell 121. In the case (B), as mentioned above, the effect which suppresses the interference in the vertical direction becomes insufficient and it is difficult to drive.
Lastly, in a case (C), as shown in FIGS. 3 and 4, the width of the horizontal separation wall 109′ in the column direction is smaller than the first width and is larger than the second width. In the case (C), the aperture percentage is determined based on a summation of the non-discharge gap 113 and the width of the bus electrode 104 in the column direction. In this structure, the maximum aperture percentage is achieved and it is possible to suppress the above-mentioned vertical interference. Therefore, it is often used in the conventional plasma display apparatus. In this structure, a portion straightly below the bus electrode 104 is partially the discharge space (cell 121) and partially the horizontal separation wall 109′. This is different from the case (A)) that a portion directly blow the bus electrode 104 is the horizontal separation wall 109′ and the case (B) that a portion directly below the bus electrode 104 is the discharge space (cell 121).
This difference is derived from the electric field intensity directly below the bus electrode 104. In other words, because the bus electrode 104 is thicker than the transparent electrode 103 but the transparent dielectric layer 105 is thin, the electric field intensity directly below the bus electrode 104 is stronger than the other portion. This exerts a large effect in case of drive of a plasma display panel. When the discharge space directly below the bus electrode 104 is larger, the line of electric force increases more. Therefore, in the write discharge in the address period, the discharge probability is high and stable. Also, the write discharge has the strong electric field intensity so that more wall electric charge is accumulated to cancel it. Therefore, subsequently, the discharge state is stably shifted to the sustain discharge. In other words, in order to carry out the stable drive, it is desirable that there is not the separation wall 109 but the discharge space or the cell 121 directly below the bus electrode 104.
In the case (C), the width of the horizontal separation wall 109′ is smaller than the first width, i.e., the summation of the non-discharge gap 113 and the width of the two bus electrodes 104 and larger than the second width, i.e., the non-discharge gap 113. At this time, since the two substrates which have diagonals close to 1 m are mated with each other and adhered through a heating process in the PDP manufacturing method, the center point P between the bus electrodes and the center line L of the horizontal separation wall 109′ are spaced by about several ten μm due to the accumulation of the mating process error and thermal contraction error in the heating process. As a result, the difference between the write properties of the cells on an odd-numbered line and an even-numbered line is caused. Also, since variation in the manufacture is not intentional, there may be a case that the odd-numbered line is superior in the write characteristic operation and the case that the even-numbered line is superior in the write characteristic operation. Thus, it is difficult to obtain the write characteristic operation which is always stable.
As a plasma display apparatus other than the plasma display panel 130, Japanese Laid Open Patent Application (JP-A-Heisei 9-120777) discloses the electrode structure of a plasma display panel which protects an erroneous discharge between adjacent cells and improves the brightness.